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19-0403; Rev 0; 6/95
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package
_______________General Description
The MAX522 contains two 8-bit, buffered, voltage-output digital-to-analog converters (DAC A and DAC B) in small 8-pin SO and DIP packages. DAC A's buffer can source and sink 5mA, and DAC B's output can source and sink 500A, both to within 0.5V of ground and V DD. The MAX522 operates with a single +2.7V to +5.5V supply. The device utilizes a 3-wire serial interface, which operates at clock rates up to 5MHz and is compatible with SPITM, QSPITM, and MicrowireTM interface standards. The serial input shift register is 16 bits long and consists of eight bits of DAC input data and eight bits for DAC selection and shutdown control. DAC registers can be loaded independently or in parallel at the positive edge of CS. The MAX522's ultra-low power consumption and small 8-pin SO package make it ideal for portable and battery-powered applications. Supply current is less than 1mA and drops below 1A in shutdown mode. In addition, the reference input is disconnected from the REF pin during shutdown, further reducing the system's total power consumption. The software format is compatible with the MAX512/MAX513 triple 8-bit DACs.
____________________________Features
o Operates from a Single +2.7V to +5.5V Supply o Dual Buffered Voltage Output o Low Power Consumption: 1mA Operating Current <1A Shutdown Current o Independently Programmable Shutdown Mode o 5MHz, 3-Wire Serial Interface o SPITM, QSPITM, and MicrowireTM Compatible o Space-Saving 8-Pin SO Package
MAX522
______________Ordering Information
PART MAX522CPA MAX522CSA MAX522EPA MAX522ESA TEMP. RANGE 0C to +70C 0C to +70C -40C to +85C -40C to +85C PIN-PACKAGE 8 Plastic DIP 8 SO 8 Plastic DIP 8 SO
________________________Applications
Digital Gain and Offset Adjustment Programmable Current Source Programmable Voltage Source Power-Amp Bias Control VCO Tuning
________________Functional Diagram
0.22F 8 DIN SCLK 2 DAC LATCH A DAC A 3 VDD 7 REF
0.1F (OPTIONAL)
__________________Pin Configuration
TOP VIEW
OUTA 5
VOUTA 0.1F
16-BIT SHIFT REGISTER CONTROL (8) DATA (8)
OUTB DAC LATCH B DAC B 6
VOUTB 0.01F
CS 1 SCLK 2 VDD 3 GND 4
8
DIN REF OUTB OUTA
MAX522
7 6 5
CS 1
MAX522
DIP/SO
4 GND
SPI and QSPI are trademarks of Motorola Inc. Microwire is a trademark of National Semiconductor Corp.
________________________________________________________________ Maxim Integrated Products 1
Call toll free 1-800-998-8800 for free samples or literature.
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522
ABSOLUTE MAXIMUM RATINGS
VDD to GND ................................................................ -0.3V, +6V Digital Inputs and Outputs to GND............... -0.3V, (VDD + 0.3V) REF ................................................................-0.3V, (VDD + 0.3V) OUTA, OUTB (Note 1)............................................................VDD Continuous Power Dissipation (TA = +70C) Plastic DIP (derate 9.09mW/C above +70C) ..............727mW SO (derate 5.88mW/C above +70C) ...........................471mW Operating Temperature Ranges MAX522C_ A.......................................................0C to +70C MAX522E_ A....................................................-40C to +85C Storage Temperature Range .............................-65C to +165C Lead Temperature (soldering, 10sec) .............................+300C
Note 1: The outputs may be shorted to VDD or GND if the package power dissipation is not exceeded. Typical short-circuit current to GND is 50mA.
Stresses beyond those listed under "Absolute Maximum Ratings" may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated in the operational sections of the specifications is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability.
ELECTRICAL CHARACTERISTICS
(VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER STATIC PERFORMANCE Resolution Differential Nonlinearity Integral Nonlinearity Total Unadjusted Error Zero-Code Temperature Coefficient Power-Supply Rejection Ratio REFERENCE INPUTS Reference Input Voltage Range Reference Input Capacitance Reference Input Resistance Reference Input Resistance (shutdown mode) DAC OUTPUTS Output Voltage Range Capacitive Load at OUT_ Output Resistance DIGITAL INPUTS Input High Voltage Input Low Voltage Input Current Input Capacitance VIH VIL IIN CIN VIN = 0V or VDD (Notes 4, 5) 0.1 (0.7)(VDD) (0.3)(VDD) 10 10 V V A pF DAC A DAC B DAC A DAC B 0 0.1 0.01 50 500 REF V F RREF (Note 3) 8 2 GND 25 VDD V pF k M PSRR 4.5V VDD 5.5V, REF = 4.096V 2.7V VDD 3.6V, REF = 2.4V N DNL INL TUE Guaranteed monotonic (Note 2) (Note 2) 1 100 0.01 0.015 8 1 1.5 Bits LSB LSB LSB V/C %/% SYMBOL CONDITIONS MIN TYP MAX UNITS
2
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Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package
ELECTRICAL CHARACTERISTICS (continued)
(VDD = +2.7V to +5.5V, REF = VDD, TA = TMIN to TMAX, unless otherwise noted. Typical values are at TA = +25C.) PARAMETER DYNAMIC PERFORMANCE Voltage-Output Slew Rate Voltage-Output Settling Time Digital Feedthrough and Crosstalk POWER SUPPLIES Supply Voltage Range Supply Current Shutdown Supply Current VDD IDD All inputs = 0V VDD = 5.5V VDD = 5.5V VDD = 3.6V 2.7 1.3 0.9 0.1 5.5 2.8 2.5 V mA A SR CL = 0.1F (DAC A), CL = 0.01F (DAC B) To 12LSB All 0s to all 1s CL = 0.1F (DAC A) CL = 0.01F (DAC B) 0.1 70 70 10 V/s s nV-s SYMBOL CONDITIONS MIN TYP MAX UNITS
MAX522
TIMING CHARACTERISTICS (Note 4)
(VDD = +2.7V to +5.5V, TA = TMIN to TMAX, unless otherwise noted.) PARAMETER SERIAL INTERFACE TIMING -- -- CS Fall to SCLK Rise Setup Time -- -- SCLK Rise to CS Rise Setup Time DIN to SCLK Rise Setup Time DIN to SCLK Rise Hold Time SCLK Pulse Width High SCLK Pulse Width Low -- -- CS Pulse Width High SYMBOL tCSS tCSH tDS tDH tCH tCL tCSPWH CONDITIONS MIN 150 150 50 50 100 100 200 TYP MAX UNITS ns ns ns ns ns ns ns
Note 2: Reduced digital code range (code 24 through code 232) is due to swing limitations of the output amplifiers. See Typical Operating Characteristics. Note 3: Reference input resistance is code dependent. The lowest input resistance occurs at code 55hex. Refer to the Reference Input section in the Detailed Description. Note 4: Guaranteed by design. Not production tested. Note 5: Input capacitance is code dependent. The highest capacitance occurs at code 00hex.
_______________________________________________________________________________________
3
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522
__________________________________________Typical Operating Characteristics
(TA = +25C, unless otherwise noted.)
OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (VDD = 3V)
MAX522 TOC-01
OUTPUT VOLTAGE vs. OUTPUT SOURCE CURRENT (VDD = 5V)
MAX522 TOC-02
OUTPUT VOLTAGE vs. OUTPUT SINK CURRENT
800 OUTPUT VOLTAGE (mV) 700 600 500 400 300 200 100 DAC B REF = VDD = 3V CODE = ALL 1s
MAX522 TOC-03
3.5 3.0 OUTPUT VOLTAGE (V) 2.5 2.0 1.5 1.0 0.5 REF = VDD = 3V CODE = ALL 1s 0.1 1 10 DAC B DAC A
5.2 5.0 OUTPUT VOLTAGE (V) 4.8 4.6 4.4 4.2 4.0 REF = VDD = 5V CODE = ALL 1s 0.1 1 10 DAC B DAC A
900 DAC A
0 0.0001 0.001 0.01
100
3.8 0.0001 0.001 0.01
100
0 0.0001 0.001 0.01
0.1
1
10
100
OUTPUT SOURCE CURRENT (mA)
OUTPUT SOURCE CURRENT (mA)
OUTPUT SINK CURRENT (mA)
TOTAL UNADJUSTED ERROR vs. DIGITAL CODE
MAX522 TOC-04
POSITIVE SUPPLY CURRENT vs. SUPPLY VOLTAGE
MAX522 TOC-05
POSITIVE SUPPLY CURRENT vs. TEMPERATURE
MAX522 TOC-06
0 DAC A LOADED WITH 5mA -5 -10 TUE (LSB) -15 -20 -25 -30 REF = VDD = 3V -35 0 32 64 96 128 DAC B LOADED WITH 0.5mA
1.5 1.4 1.3 1.2 IDD (mA) REF = VDD ALL LOGIC INPUTS GROUNDED
1.370 1.365 1.360 IDD (mA) 1.355 1.350 1.345 1.340 REF = VDD = 5V ALL LOGIC INPUTS = 5V ALL DACs SET TO ALL 1s -60 -40 -20 0
1.1 1.0 0.9 0.8 0.7 0.6
160 192 224 255
0.5 2.5 3.0 3.5 4.0 VDD (V) 4.5 5.0 5.5
20 40 60 80 100 120 140
DIGITAL CODE
TEMPERATURE (C)
SHUTDOWN SUPPLY CURRENT vs. TEMPERATURE
MAX522 TOC-07
REFERENCE FEEDTHROUGH vs. FREQUENCY
MAX522 TOC-08
REFERENCE LARGE-SIGNAL FREQUENCY RESPONSE
MAX522 TOC-09
4.5 SHUTDOWN SUPPLY CURRENT (A) 4.0 3.5 3.0 2.5 2.0 1.5 1.0 REF = VDD = 5V ALL LOGIC INPUTS = 5V ALL DACs SET TO ALL 1s
0 -20 FEEDTHROUGH (dB) -40 -60 -80 DAC A, B VDD = 3V VREF = 0V TO 2.9V SINE WAVE NO LOAD CODE = ALL 0s
5 0 RELATIVE OUTPUT (dB) -5 -10 -15 -20 VDD = 3V VREF = 0V TO VDD SINE WAVE 0.01 0.1 1 10 100
-100 0.5 0 -60 -40 -20 0 20 40 60 80 100 120 140 TEMPERATURE (C) -120 0.01 0.1 1 10 100 1000 FREQUENCY (kHz)
-25 0.001
1000
FREQUENCY (kHz)
4
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Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package
____________________________Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted.)
MAX522
REFERENCE SMALL-SIGNAL FREQUENCY RESPONSE
0 RELATIVE OUTPUT (dB)
MAX522 TOC-10
DAC A
-20 DAC B -40
-60
-80
VDD = 3V VREF = 1.5V DC WITH 40mVP-P SINE WAVE SUPERIMPOSED 0.1k 1k 10k 100k 1M 10M
FREQUENCY (Hz)
LINE-TRANSIENT RESPONSE (OUTA)
CLOCK FEEDTHROUGH (OUTA)
A
3.14V A 2.86V B
B
20s/div REF = 2.56V, NO LOAD, CODE = ALL 1s A : VDD, 100mV/div B : OUTA, 500V/div CS = HIGH
1s/div
A: SCLK, 333kHz, 0V TO 2.9V, 2V/div B: OUTA, 2mV/div
_______________________________________________________________________________________
5
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522
____________________________Typical Operating Characteristics (continued)
(TA = +25C, unless otherwise noted).
POSITIVE SETTLING TIME (DAC A)
POSITIVE SETTLING TIME (DAC B)
A
A
B
B
20s/div VDD = 3V, REF = VDD, RL = 1k , CL = 0.1F, ALL BITS OFF TO ALL BITS ON A: CS, 2V/div B: OUTA, 20mV/div
20s/div VDD = 3V, REF = VDD, RL = 10k , CL = 0.01F, ALL BITS OFF TO ALL BITS ON A: CS, 2V/div B: OUTB, 20mV/div
TIME EXITING SHUTDOWN MODE
OUTPUT VOLTAGE NOISE (DC TO 1MHz)
A
B
OUTA 200V/div
20s/div VDD = 3V, REF = VDD, RL = 1k , CL = 0.1F, DAC LOADED WITH ALL 1s A: CS, 2V/div B: OUTA, 1V/div
2ms/div DIGITAL CODE = 80, REF = VDD, NO LOAD
6
_______________________________________________________________________________________
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package
______________________________________________________________Pin Description
PIN NAME -- -- CS SCLK VDD GND OUTA OUTB REF DIN FUNCTION Chip Select (active low). Enables data to be shifted into the 16-bit shift register. Programming commands -- -- are executed at the rising edge of C S. Serial Clock Input. Data is clocked in on the rising edge of SCLK. Positive Power Supply (2.7V to 5.5V). Bypass with 0.22F to GND. Ground DAC A Output Voltage (Buffered). Connect 0.1F capacitor or greater to GND. DAC B Output Voltage (Buffered). Connect 0.01F capacitor or greater to GND. Reference Input for DAC A and DAC B Serial Data Input of the 16-bit shift register. Data is clocked into the register on the rising edge of SCLK.
MAX522
1
2 3 4 5 6 7 8
_______________Detailed Description
Analog Section
The MAX522 contains two 8-bit, voltage-output digitalto-analog converters (DACs). The DACs are "inverted" R-2R ladder networks using complementary switches that convert 8-bit digital inputs into equivalent analog output voltages in proportion to the applied reference voltage. The MAX522 has one reference input which is shared by DAC A and DAC B. The device includes output buffer amplifiers for both DACs and input logic for simple microprocessor (P) and CMOS interfaces. The power-supply range is from +5.5V down to +2.7V.
The reference voltage on REF can range anywhere from GND to VDD. See the Output Buffer Amplifier section for more information.
Reference Input and DAC Output Range The voltage at REF sets the full-scale output of the DACs. The input impedance of the REF input is code dependent. The lowest value, approximately 8k, occurs when the input code is 01010101 (55hex). The maximum value of infinity occurs when the input code is zero. In shutdown mode, the selected DAC output is set to zero while the value stored in the DAC register remains unchanged. This removes the load from the reference input to save power. Bringing the MAX522 out of shutdown mode restores the DAC output voltage. Because the input resistance at REF is code dependent, the DAC's reference sources should have an output impedance of no more than 5. The input capacitance at the REF pin is also code dependent and typically does not exceed 25pF.
Output Buffer Amplifiers DAC A and DAC B voltage outputs are internally buffered. The buffer amplifiers have a rail-to-rail (GND to VDD) output voltage range. The DAC outputs are internally divided by two and the buffer is set to a gain of two, eliminating the need for a buffer input voltage range to the positive supply rail. DAC A's output amplifier can source and sink up to 5mA of current (0.5mA for DAC B's buffer). See the Total Unadjusted Error vs. Digital Code graph in the Typical Operating Characteristics. The amplifier is unity-gain stable with a capacitive load of 0.1F (0.01F for DAC B's buffer) or greater. The slew rate is limited by the load capacitor and is typically 0.1V/s with a 0.1F load (0.01F for DAC B's buffer). Shutdown Mode When programmed to shutdown mode, the outputs of DAC A and DAC B go into a high-impedance state. Virtually no current flows into or out of the buffer amplifiers in that state. In shutdown mode, the REF inputs are high impedance (2M typical) to conserve current drain from the system reference; therefore, the system reference does not have to be powered down. Coming out of shutdown, the DAC outputs return to the values kept in the registers. The recovery time is equivalent to the DAC settling time.
_______________________________________________________________________________________
7
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522
Table 1. Input Shift Register
B0* B1
R R R
DAC Data Bit 0 (LSB) DAC Data Bit 1 DAC Data Bit 2 DAC Data Bit 3 DAC Data Bit 4 DAC Data Bit 5 DAC Data Bit 6 DAC Data Bit 7 (MSB) Load Reg DAC A, Active High Load Reg DAC B, Active High Uncommitted Bit 4 Shut Down DAC A, Active High Shut Down DAC B, Active High Uncommitted Bit 3 Uncommitted Bit 2 Uncommitted Bit 1
DATA BITS
B2 B3 B4 B5 B6 B7 LA
OUT
2R
2R
2R
2R
2R
CONTROL BITS
REF GND SHOWN FOR ALL 1s ON DAC
LB UB4 SA SB UB3 UB2 UB1**
Figure 1. DAC Simplified Circuit Diagram
**Clocked in last. **Clocked in first.
Serial Interface -- -- An active-low chip select (CS) enables the shift register to receive data from the serial data input. Data is clocked into the shift register on every rising edge of the serial clock signal (SCLK). The clock frequency can be as high as 5MHz. Data is sent MSB first and can be transmitted in one - - 16-- bit word. The write cycle can be segmented when CS is kept active (low) to allow, for example, two 8-bit-wide transfers. After clocking all - bits into the input shift - 16 -- register, the rising edge of CS updates the DAC outputs and the shutdown status. Because of their single buffered structure, DACs cannot be simultaneously updated to different digital values.
Serial-Input Data Format and Control Codes Table 2 lists the serial-input data format. The 16-bit input word consists of an 8-bit control byte and an 8-bit data byte. The 8-bit control byte is not decoded internally. Every control bit performs one function. Data is clocked in starting with UB1 (Uncommitted Bit), followed by the remaining control bits and the data byte. The LSB of the data byte (B0) is the last bit clocked into the shift register (Figure 2). Table 3 is an example of a 16-bit input word. It performs the following functions: * 80hex (128 decimal) loaded into DAC registers A and B. * DAC A and DAC B are active.
8
_______________________________________________________________________________________
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522
CS INSTRUCTION EXECUTED OPTIONAL DIN UB1 UB2 UB3 SB SA UB4 LB LA D7 D6 D5 D4 D3 D2 D1 D0
SCLK
(CONTROL BYTE)
(DATA BYTE)
Figure 2. MAX522 3-Wire Serial-Interface Timing Diagram
Table 2. Serial-Interface Programming Commands
CONTROL UB1 UB2 UB3 SB X X X X X X X X X X X X X X X X X X X X 1 1 1 1 1 1 1 1 1 1
*
DATA FUNCTION LA 0 0 0 1 1 * * * * * X X X X X X X X X X X X X X X 8-Bit DAC Data 8-Bit DAC Data 8-Bit DAC Data X X X X X X X X X X X X X X X X X X X X X X X X X B7 B6 MSB X X B5 X B4 X B3 X B2 X B1 X B0 LSB X No Operation to DAC Registers Unassigned Command Load Register to DAC B Load Register to DAC A Load Both DAC Registers All DACs Active Unassigned Command Shut Down DAC B Shut Down DAC A Shut Down All DACs
SA UB4 LB * * * * * 0 0 0 1 1 0 0 0 0 0 0 0 0 0 0 0 0 1 0 1 * * * * *
* * * * 0 0 1 0 1
X = Don't care.
* = Not shown, for the sake of clarity. The functions of loading and shutting down the DACs and programming the logic can be combined in a single command.
Table 3. Example of a 16-Bit Input Word
Loaded in First UB1 X UB2 X UB3 1 SB 0 SA 0 UB4 0 LB 1 LA 1 B7 1 B6 0 B5 0 B4 0 B3 0 B2 0 B1 0 Loaded in Last B0 0
_______________________________________________________________________________________
9
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522
CS tCSPWH tCSS tCH SCLK tCSH
tDS tDH
tCL
DIN
Figure 3. MAX522 Detailed Serial-Interface Timing Diagram
Digital Inputs The digital inputs are compatible with CMOS logic. Supply current increases slightly when toggling the logic inputs through the transition zone between (0.3)(VDD) and (0.7)(VDD). Microprocessor Interfacing The MAX522 serial interface is compatible with Microwire, SPI, and QSPI. For SPI, clear the CPOL and CPHA bits (CPOL = 0 and CPHA = 0). CPOL = 0 sets the inactive clock state to zero and CPHA = 0 changes data at the falling edge of SCLK. This setting allows SPI to run at full clock speeds (0.5MHz). If a serial port is not available on your P, three bits of a parallel port can be used to emulate a serial port by bit manipulation. Minimize digital feedthrough at the voltage outputs by operating the serial clock only when necessary.
Table 4. Code Table
DAC CONTENTS B7 B6 B5 B4 B3 B2 B1 B0 1 1 1 1 1 1 1 1 ANALOG OUTPUT
255 +REF x 256 129 +REF x 256
+REF x 128 = 256 + REF 2
1
0
0
0
0
0
0
1
1
0
0
0
0
0
0
0
0
1
1
1
1
1
1
1
127 +REF x 256 1 +REF x 256
0V
0 0
0 0
0 0
0 0
0 0
0 0
0 0
1 0
Note: 1 1LSB = REF x 2 -8 = REF x 256 D ANALOG OUTPUT = REF x 256 where D = Decimal Value of Digital Input
10
______________________________________________________________________________________
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package
______________Applications Information The MAX522 is specified for single-supply operation with VDD ranging from 2.7V to 5.5V, covering all commonly used supply voltages in 3V and 5V systems.
MAX522
Initialization
There is no internal power-on reset. Therefore, at power-up, perform an initial write operation to set the outputs to the desired voltage.
Power-Supply and Ground Management
GND should be connected to the highest quality ground available. Bypass VDD with a 0.1F to 0.22F capacitor to GND. The reference input can be used without bypassing. For optimum line/load-transient response and noise performance, bypass the reference input with 0.1F to 4.7F to GND. Careful PC board layout minimizes crosstalk among DAC outputs, the reference, and digital inputs. Separate analog lines with ground traces between them. Make sure that highfrequency digital lines are not routed in parallel to analog lines.
______________________________________________________________________________________
11
Dual, 8-Bit, Voltage-Output Serial DAC in 8-Pin SO Package MAX522
________________________________________________________Package Information
E D A3 A A2 E1
DIM A A1 A2 A3 B B1 C D1 E E1 e eA eB L INCHES MAX MIN 0.200 - - 0.015 0.175 0.125 0.080 0.055 0.022 0.016 0.065 0.045 0.012 0.008 0.080 0.005 0.325 0.300 0.310 0.240 - 0.100 - 0.300 0.400 - 0.150 0.115 INCHES MIN MAX 0.348 0.390 0.735 0.765 0.745 0.765 0.885 0.915 1.015 1.045 1.14 1.265 MILLIMETERS MIN MAX - 5.08 0.38 - 3.18 4.45 1.40 2.03 0.41 0.56 1.14 1.65 0.20 0.30 0.13 2.03 7.62 8.26 6.10 7.87 2.54 - 7.62 - - 10.16 2.92 3.81 MILLIMETERS MIN MAX 8.84 9.91 18.67 19.43 18.92 19.43 22.48 23.24 25.78 26.54 28.96 32.13
21-0043A
L A1 e B D1
0 - 15 C B1 eA eB
Plastic DIP PLASTIC DUAL-IN-LINE PACKAGE (0.300 in.)
PKG. DIM PINS P P P P P N D D D D D D 8 14 16 18 20 24
DIM
D A e B
0.101mm 0.004in.
0-8
A1
C
L
A A1 B C E e H L
INCHES MAX MIN 0.069 0.053 0.010 0.004 0.019 0.014 0.010 0.007 0.157 0.150 0.050 0.244 0.228 0.050 0.016
MILLIMETERS MIN MAX 1.35 1.75 0.10 0.25 0.35 0.49 0.19 0.25 3.80 4.00 1.27 5.80 6.20 0.40 1.27
E
H
Narrow SO SMALL-OUTLINE PACKAGE (0.150 in.)
DIM PINS D D D 8 14 16
INCHES MILLIMETERS MIN MAX MIN MAX 0.189 0.197 4.80 5.00 0.337 0.344 8.55 8.75 0.386 0.394 9.80 10.00
21-0041A
Maxim cannot assume responsibility for use of any circuitry other than circuitry entirely embodied in a Maxim product. No circuit patent licenses are implied. Maxim reserves the right to change the circuitry and specifications without notice at any time.
12 __________________Maxim Integrated Products, 120 San Gabriel Drive, Sunnyvale, CA 94086 (408) 737-7600 (c) 1995 Maxim Integrated Products Printed USA is a registered trademark of Maxim Integrated Products.

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